Marvell Senior Staff System Validation Engineer 

United States, California 

313173341

What You Can Expect

As a Senior Distinguished Memory Architect Engineer in the CTO Office organization, you’ll be responsible for:

• Defining next generation custom and standard based memory solutions which provide differentiating value to datacenter SoC products.
• Researching state-of-the-art memory technologies, close collaboration with SoC architects, and pathfinding memory architectures and solutions.
• Weigh technical tradeoffs affecting performance, power, area, reliability, and yield, and to effectively communicate value propositions and risks to organizational leaders.
• Work across peer SoC architecture, system, and design team, leveraging their expertise into pathfinding new IP solutions across a broad range of marketapplications.
• Work with limited direction, have keen attention to detail, and be able to provide crisp status of program progress, issues, and risks to the management team.
• Leading the development of performance models and features to enhance memory system performance and efficiency.
• Responsible for performance analysis, micro-benchmarking, workload characterization, competitive analysis, bottleneck identification, and optimization.
• Communicate, propose, and implement solutions to processor and system performance issues.
• Work with relevant standard organizations, vendors, peer companies and customers to drive memory innovations.
• Drive initiatives into standard organizations representing Marvell.

What We're Looking For

• Deep familiarity and understanding of memory systems, memory component technologies, DDR, HBM, memory controller architecture, various DIMM types and caching architectures.
• Prior experience with HBM and DDR4/5 technologies is a must requirement.
• A proven and successful track record of shipping memory system products at scale for complex SoCs / processors / GPUs.
• Hands on experience in performance model development, able to develop exceptionally accurate models for tradeoff analysis and performance evaluation.
• Effective communication and interpersonal abilities to drive innovation, work collaboratively with peer architecture, design teams, and senior management.
• Previous experience with high-speed memory technology pathfinding work with limited upfront guidance, pushing the boundaries of technology.
• A B.S., M.S., or Ph.D. in Computer Science, Computer Engineering, or Electrical Engineering (or equivalent experience).
• 18+ years of experience in SoC or memory system architecture preferably in complex SoC development, memory development companies, CPU/GPU and AI development.

Expected Base Pay Range (USD)

211,290 - 316,500, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at