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Intel Emulation Engineer Bolivia, Santa Cruz, San José de Chiquitos 313035325
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Builds emulation and FPGA models and solutions from RTL design using synthesis, partitioning, and routing tools. Develops, integrates, tests, and debugs hardware and software collateral in simulation, emulation, and FPGA models for testing new features, writes directed tests, develops the test environment and hybrid emulation environment, and supports verification of hardware and software/firmware. Defines and develops new capabilities and tools to achieve better verification through improved emulation and FPGA model usability. Enables acceleration of RTL development and improve emulation/FPGA model usability for presilicon verification, postsilicon validation, and software development. Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform and interfaces with and provides guidance to verification teams for optimizing presilicon verification environments, test suites, and methodologies for emulation efficiency. Develops and utilizes automation aids, flows, and scripts in support of emulation utilization. Applies understanding of emulation and FPGA prototyping tools and methodologies, SoC integration, emulation transactors, emulation performance and optimization techniques, RTL simulation, and hybrid emulation environments (virtual platform and FPGA/emulation model). Collaborates with design, power and performance, silicon validation, and software teams, and participates in SoC and IP bring up, root causes testbench issues, IP and SoC testcases, and emulator/FPGA environment issues.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science or related field, or Master’s degree in related field.
1+ years of experience in the following:
Linux experience.
Verilog or System Verilog.
Experience with scripting languages, examples Perl, Python, Tcl, etc.
Intermediate to Advanced English level.
Preferred Qualifications:
Experience with digital logic design.
Computer architecture and or SoC architecture knowledge
Experience with Synopsys, Cadence or other industry standard EDA tools i.e. Verdi, VCS
Experience in all aspects of pre-silicon functional verification, including planning, debug, testbench design, UPF and coverage closure.
Should have strong scripting/coding skills.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
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