Intel IP Design Verification Lead Engineer 

Malaysia, Penang 

311674661

Join the exciting new journey of Altera as we march towards a stand-alone company.
From the IoT to the data center, Altera offers a broad portfolio of programmable logic solutions that allow customers to solve a wide variety of system level challenges.

• Be part of the talented PCIe IP design verification team

• We are looking for experts in IP design verification architecture

Responsibility includes

• Review the design requirements and develop the verification strategy for the IP

• Responsible for leading project execution and tracking team's status

• Create test plans based on Architecture and Microarchitecture specifications

• Review and implementation of test plan, coverage analysis, and regression cleanup

• Understanding and enhancement of Design Verification processes in the FPGA development flow

• Define and implement the common test environment by working with the stakeholders from both HW and SW domains

• Provide technical guidance to junior engineers

Qualifications

• MSEE or equivalent with 8 years, or BSEE or equivalent with 10 years of experience in IP / SoC design.

• Strong in System Verilog, UVM, Verilog

• Strong in coverage-based verification methodology with assertions

• Familiar with Perl, Python, Java

• Knowledge on PCIe is a big plus

• Hands on experience on leading project execution

• Strong skills in communication, initiative, promote innovation and teamwork

• Highly motivated to learn and adapt to fast changing technologies and environments

• Demonstrates fundamental values such as accountability, integrity and a winning mindset

• Excellent communication and leadership skills and a proven ability to work with challenging schedules.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits