Qualcomm GPU Functional Verification Sr Engineer 

India, Karnataka, Bengaluru 

311334592

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

In the role ofGPU Functional Verification Engineer, your project responsibilities will include the following,

• Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces

• Strategize, brainstorm, and propose a DV environment, develop test bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices

• Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality

• Collaborate with worldwide architecture, design, and systems teams to achieve all project goals

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Strong knowledge of UVM based System Verilog TB Knowledge of GPU pipeline design is a plus, not mandatory Proficiency with formal tools – working knowledge of Property based FV is a plus, not mandatory Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver

Experience

• Minimum 3 years of Design verification experience

• Senior positions will be offered to candidates with suitable years of experience and proven expertise matching the profiles listed above

Education Requirements

• BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent courses from reputed universities

The
pre-Si verificationteam in Bangalore is currently heavily involved in the following

• UVM/SV based constrained random test bench for functional verification

• Subsystem level TB for complete GPU workload analysis and compliance

• Emulation platforms to analyze performance and pipeline bottlenecks

• Formal tools – both for reduced time to bug & property based FV sign-off

• Power Aware & Gate level simulations to deliver a high-quality GPU implementation

• Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.