Intel Post Silicon Validation Engineer 

India, Karnataka, Bengaluru 

30637670

Job Description

• Our team is responsible for Silicon level HW/ FW/SW validation, find bugs and drive fixes.
• As a Post Silicon Validation Engineer ( Thunderbolt Hardware), you are required to create, define and develop system validation environment & test suites optimized for a CPU or its subsystems like Power management, PCIe, DP, USB/TCSS, Serial IO, [TBT3] /USB4 and USB5 other modules of given complexity & meeting requirements as per spec.
• You are responsible for the development of methodologies, execution of validation plans/ coverage, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features.
• You are focal point between a number of Architecture, Design, System software developers and Validation teams within Intel and across different sites.

• Bachelor's/Master's in Hardware Engineering /ElectronicsEngineering /Computer Engineering or Computer Science with minimum 6 years to 10 years (Domain Lead position) of related work experience.
• Candidate Must have high degree of Hardware architecture/ microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below
• Must have [in any one or more domains]
  • Deep understanding on Type C Sub system, Thunderbolt [TBT3/ USB4 and USB5], Display architecture will be added advantage
  • familiar in USB architecture USBBulk/Interrupt/Isochronoustransfer, Type of USB, Host/Device relationship, Transmission & etc.
  • familiar in PCIe architecture with PCIe interconnect, link, Lane, Configuration, Interrupt, I/O Read/Write, PCIe Layer, Form Factor & etc.
  • Excellent written and oral communications and experience working in a cross functional team environment are essential.
  • Good Team Player.
  • Processes strong problem solving, analytical and debug skills.

• Added advantage
  • Good working knowledge in C++/Python SW programming for content development and scripting.
  • Knowledge of IA/ARM core and system level Power Management architecture who familiar in PMC feature, Gate/Chip level power management transition state & etc. Understanding of System Reset related Validation expertise is a plus.
  • Solid understanding of the Validation and Debug flows of a complex CPU Silicon
  • Knowledge on Validation/ Debug Flows and overall SOC Architecture.
  • Pre-silicon Design / Validation knowledge is a value added.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits