Qualcomm Senior Timing Engineer - Cork 

Ireland, Cork 

300089309

QT Technologies Ireland Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

What are we looking for?

• Extensive work experience in timing related activities and responsibilities such as library, LVF, AOCV/POCV/SOCV …etc

• Experience in CAD tools including correlation between different timing sign-off tools vs. Spice simulation across different metrics such as timing, noise, monte-carlo, etc

• Deep understanding of library characterisation process and flow with hands on experience on standard cell library characterisation

• Strong ability in automating and developing new flows to improve overall productivity of the team using Python, Perl, TCL, Bash … etc

• Working knowledge of Spice extraction, modelling and aging reliability model for latest technology nodes

• Proven knowledge of latest technologies nodes and practices in physical design including Place and Routs (P&R) and Static timing analysis (STA) sign-of

• Be willing to learn and involve in developing and validating new methodologies

Preferred Qualifications:

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

• 3+ years of ASIC design, verification, validation, integration, or related work experience.

• 2+ years of experience with architecture and design tools.

• 2+ years of experience with scripting tools and programming languages.

• 2+ years of experience with design verification methods.

Principal Duties & Responsibilities:

• Applies ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.

• Creates architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.

• Collaborates across teams (e.g., software architecture, hardware architecture) to develop and execute an implementation strategy that meets system requirements and customer needs.

• Evaluates all aspects of process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.

• Utilises tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of an individual block/SoC or IC Package.

• Writes detailed technical documentation for EDA/IP/ASIC projects

Where you will be working

Apart from working in an open, relaxed and collaborative space, you will enjoy:

• Salary, stock and performance related bonus

• Maternity/Paternity Leave

• Employee stock purchase scheme

• Matching pension scheme

• Education Assistance

• Relocation and immigration support (if needed)

• Life, Medical, Income and Travel Insurance

• Subsidised memberships for physical and mental well-being

• Bicycle purchase scheme

• Employee run clubs, including, running, football, chess, badminton + many more

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.