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Job Duties:
• Partner with our design team to drive the physical design aspects of a complex, high-frequency processor chip, including integration, logic synthesis, LVS, DRC, static timing, noise analysis, and power routing.
• Provide physical design feedback to logic owners and other stakeholders to ensure the chip design is on the best path to closure and delivery to fabrication.
• Apply your experience to mentor junior engineers, improve physical design methodology, and increase the overall efficiency of your team.
• BSEE and 4 years or MSEE and 3 years of experience in physical design.
• Demonstrated experience in scripting and methodology flows.
• Experience in physical design closure.
• Demonstrated communication skills in a global team environment.
• Experience with EDA tools, Cadence, Synopsys, etc.
• Experience with scripting languages used in hardware design, Tcl, Python, Perl, etc.
• Experience in custom layout.
• Exposure to integration methods and requirements.
• Exposure to static timing analysis and noise analysis.
• Exposure to industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs)
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