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Cisco ASIC Design Verification Engineer 6+ years exp 
India, Karnataka, Bengaluru 
285738601

Yesterday

ASIC design role

  • Develop high-performance designs/ASICs from specification to tape-out
  • Define architecture/micro-architecture and write specifications
  • Implement complex RTL designs to meet timing and performance requirements
  • Define, evolve, and support design methodology
  • Mentor junior engineers and colleagues
  • Collaborate with verification, PD, DFT, package, and software teams
  • Perform diagnostic and post-silicon validation tests in the lab
  • Work with hardware and software teams to triage and root cause failures
  • Participate in design and code reviews
  • Scope third-party IP requirements and solicit vendors
  • Analyze code coverage and provide feedback for coverage closure
  • Perform lint and CDC checks
  • Build timing constraints for synthesis and STA
  • Work closely with the physical design team to resolve design timing and place-and-route issues
ASIC verification role
  • Develop test plans, cover points, and qualification tests
  • Perform end-to-end verification of design blocks and top-level
  • Build and maintain block, cluster, and top-level DV environment infrastructure
  • Construct testbenches components like scoreboard, agents, sequencers, and monitors
  • Write tests, debug regressions, and drive to module verification closure
  • Collaborate with designers and verification engineers for cross-block verification
  • Upgrade configuration/reset sequences (APIs)
  • Develop environment and tests for emulation
  • Ensure complete verification coverage through code, functional coverage, and gate-level simulations
  • Support post-silicon bring-up and optimize integration and performance
Minimum Qualifications
  • Bachelor’s Degree in EE, CE, or other related fields with 6+ years or Master’s Degree with 4+ years of ASIC design or verification experience
  • Experience in delivering complex blocks from microarchitecture to tape out as a front end designer.
  • Proficient in verifying complex blocks and/or clusters for ASIC using UVM/System Verilog.
  • Scripting experience with Perl, Python, TCL, shell scripts.
Preferred Qualifications
  • Experience in Data center/ Hyper scaler /AI Networking technologies
  • Proven experience meeting and delivering project milestones and deadlines.
  • Ability to communicate technical concepts to audiences spanning executives to junior engineers to customers.
  • Demonstrated ability in troubleshooting and debugging.
  • Experience with Emulation and Formal Verification tools is a plus.