Amazon HBM PHY Expert Annapurna Labs 

United States, Texas, Austin 

279640895

Key job responsibilities
As a senior member of the team, you will collaborate with architects, design teams, software engineers to deliver the next generation ML chip. In this position, you will have the opportunity to be responsible for IP integration, 2.5D design, bring up, Characterization and validation.A day in the life
About the team
About the teamDiverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.About AWSWork/Life Balance
Mentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

-BS or MS in EE, ECE or CS
-7+ years of experience in Silicon development with -3+ years in SOC/IO/Subsystems
-Good understanding of DDR/HBM at the PHY and controller level
-Good knowledge of DDR/HBM training, timing parameters and/or controller features
-Drive the IP Integration and design of silicon and 2.5D packaging
-Support the physical design team, review clocking and timing constraints
-Drive cross-functional triage effort on complex functional and performance issues
-Take the leadership role in post-silicon bring-up of IO and HBM/DRRx stack
-Define boot-up initiatization, reset flow, training sequence
-Perform system-level debug and root-cause analysis through bring-up, characterization, validation and production phase
-Experience Working with 3rd party IP and memory vendors