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Apple SoC Physical Design Engineer STA/Timing United States, California, San Diego 277593233
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Key Qualifications
- Minimum BS and 10+ years of relevant industry experience.
- Familiar with all aspects of timing of large high-performance SoC designs in sub-micron technologies.
- Expert in STA and methodologies for timing closure, and have a deep understanding of noise, crosstalk, and OCV effects, among others.
- Familiar with circuit modeling including SPICE models and worst-case corner selection.
- Strong programming skills with Perl and TCL.
- Experience with large design STA and Timing Closure.
- Expert in ECO techniques and implementation.
- Good communicator who can accurately describe issues, propose solutions, and drive them through completion.
Description
• Work with design teams to understand and debug constraints, facilitate logic changes to improve timing.• Work with Physical Design team, highlighting issues and best practices.• Help create timing ECO’s for project tapeout.• Create and maintain scripts and methodologies for analysis and runs.• Create documentation and help with guidelines/specs.• Deep analysis of timing paths to identify key issues.• Implement timing infrastructure.
Education & Experience
Minimum BS and 10+ years of relevant industry experience
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $161,700.00 and $284,900.00, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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