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Google Silicon Low Power Design Engineer TPU Google Cloud 
India, Karnataka, Bengaluru 
274834155

18.09.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 5 years of experience in ASIC/SoC development, with a focus on Power optimization.
  • Experience handling Low Power schemes, power roll up, and power estimations.
  • Experience with ASIC design verification, synthesis, and timing analysis.

Preferred qualifications:
  • Experience with programming languages (e.g., Python, C/C++ or Perl).
  • Experience in SoC designs and integration flows.
  • Experience with power optimization and Power modeling tools.
  • Knowledge of high performance and low power design techniques.