Nvidia Senior Power Architecture Optimization Engineer 

United States, California 

269710984

What You'll Be Doing:

• Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.
• Develop and share best practices for performing pre-silicon power analysis.
• Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.
• Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.
• Select and run a wide variety of workloads for power analysis.
• Prototype a new architectural feature in Verilog and analyze power.
• Automate flows, define new flows to fast-track Power anomaly detection.
• Use AI to come up with Power optimization solutions.

What We Need To See:

• MS (or equivalent experience) with 3+ years of experience or PhD in related fields.
• Strong understanding of concepts of energy consumption, estimation, data movement and low power design.
• Familiarity with Verilog and ASIC design principles, including knowledge of Power Artist, PTPX (Prime Power RTL, RTL Architect).
• Good verbal/written English and interpersonal skills; much collaboration with design teams is expected.
• Strong coding/automation skills, preferably in Python, Perl, and C++.
• Desire to bring data-driven decision-making and analytics to improve our products.