Intel GPU HW IP Design Verification Engineer Intern 

Poland, Masovian Voivodeship, Warsaw 

269023091

Job Description:

In this role, the candidate supports technical leadership in the overall HW IP definition, design, implementation, verification and documentation for SoC sub-system development.

You will support teams of design engineers, system architects, micro-architects, and verification engineers to ensure that the design is implemented to specification.

Qualifications / Minimum Requirements:

We welcome applications from candidates with:

• knowledge of digital electronics
• knowledge of arithmetic of digital systems
• knowledge of hardware description languages (Verilog, SystemVerilog, VHDL)
• knowledge of digital signal processing (DSP) andalgo development
• knowledge of object programming (C++)
• good communication skills (English and Polish)

If you have your own projects, we would love to have a look at them, so remember to include their description andprofile in your CV.

It would be an advantage if you had interest/knowledge and would like to develop your skills in:

• GPU/CPU, ASIC/FPGA platforms, and ASIC design flow 3D Graphics Pipeline and GPU architecture
• Graphics APIs e.g. OpenGL, Vulkan, DirectX, Rendering and Ray Tracing algorithms
• Scripting languages e.g. Python
• Math formal proofs (coq, gappa, ACL2)
• RTL Design/ uArch
• Modelling HW IPs / programming skills in C/C++
• Numerical Validation (SystemVerilog/C++ co-simulation)
• Functional Verification principles and knowledge of UVM methodology
• Formal Verification principles: SVA (SystemVerilog assertions), and control and data path formal verification

Please note that all your qualifications which may be useful for this role should be mentioned in your application.

We ask that all applicants are current university students and will remain students during the length of our internship.

Student / InternShift 1 (Poland)Virtual Poland