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Google Design Verification Engineering Manager Silicon India, Karnataka, Bengaluru 263031013
01.09.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of experience in Logic Design and verification.
- Experience with RTL, Verilog, UVM, and System Verilog.
- Experience in coding using Perl, Python, TCL scripting languages.
- Experience with synthesis and static timing analysis.
Preferred qualifications:
- Experience in modern full chip verification methods.
- Experience in sign-off tools for full custom designs.
- Experience in Microdisplay backplane design and verification.
- Experience in CAD flow from netlist to GDSII.
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