As ASIC Verification Engineer in The Core Hardware Business Unit, you will be engaged the following tasks:
•Implementation of DV infrastructure for block, cluster and top level environments.
•Maintaining existing DV environments and enhancing them
•Ensuring complete verification coverage through implementation and review of code and functional coverage.
•Working closely with architects and designers to ensure verification completeness.
•Supporting tests done with emulation
•Engage in tasks to prepare for post-silicon-validation
•Ability to understand functional specifications outlined in design documentation to develop verification plan.
•Have good communication, interpersonal skills and a keen interest to work closely in a team environment.
•Networking knowledge preferred, but not essential.
•Bachelors of Science in Electrical Engineering or Computer Science or related degree
•5+ years of experience in high-performance ASIC verification.
•Experience with System Verilog HVL and HDL languages/tools
•Experience with Scripting and programming languages such as C++, Python or Perl, Shell
•Experience with object-oriented programming.
•Experience in emulation-based verification
•Experience with Networking knowledge
•Master’s degree with 3+ years in high-performance ASIC verification.
•Experience with ASIC design and verification methodologies and flows.