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What You'll Be Doing:
Develop chip and system-level power savings features to address existing and new product opportunities.
Deep dive into key product use cases and adapt the engineering focus accordingly.
Analyze chip utilization, efficiency, and latency telemetry of key product use cases to drive the development of new features with the highest return and investment tradeoff.
Define and coordinate HW, SW, Ops, Board, and Platform requirements to deliver features that meet product and productization needs.
Lead HW debug efforts to root cause feature sequences bugs, silicon bugs, and complex system-level issues caused by interactions between multiple HW and SW features.
What We Need to See:
BS or MS degree in EE/CE or equivalent experience
10+ years of experience in some of the following areas:
Architect, develop and debug silicon and system power savings features
Analyzing Data Center, Client, or Automotive use cases with emphasis on silicon energy efficiency
Functional and Power HW validation for silicon and system power-saving features.
Effective in a collaborative environment.
You will also be eligible for equity and .
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