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What you'll be doing:
Design best-in-class SRAM circuits using state-of-the-art technology processes
Optimize circuits for performance, area, and power
Supervise mask designers to craft high quality and dense pitch-matched layout
Verify functionality, electrical integrity, and robustness
Improve/develop flows and methodologies to streamline design automation, data collection, and analysis to ensure working silicon
What we need to see:
BS/MS/PhD (or equivalent experience) in Electrical or Computer Engineering
Minimum 3 years of circuit design experience
Experience with scripting languages - Perl and Python
Strong understanding of SRAM and memory design techniques and macro/block development
Ways to stand out from the crowd:
Self-motivation, attention to detail, strong data analysis and clear communication and presentation skills
Familiarity with industry tools such as Cadence Virtuoso for schematic and layout, SPICE simulators, waveform viewers
Background with developing and using various flows and methodologies including: Static Timing analysis, EM and IR analysis, Formal Verification
You will also be eligible for equity and .
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