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Google ASIC Design Verification Engineer University Graduate PhD Machine Learning 
United States, Wisconsin, Madison 
251435392

Today
Info Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Madison, WI, USA; Sunnyvale, CA, USA.Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
Minimum qualifications:
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • Experience in verifying digital logic at RTL using SystemVerilog for ASICs.

Preferred qualifications:
  • Experience with verification methodology (e.g., UVM/OVM/VMM).
  • Experience with the full verification life cycle.
  • Expertise in SystemVerilog.
  • Excellent problem solving and communication skills, with the ability to be a team player.