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Google Physical Design Engineer Static Timing Analysis 
Israel, Tel Aviv District, Tel Aviv-Yafo 
247000090

25.09.2024
Info Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering or equivalent practical experience.
  • Experience in RTL2GDS, Static Timing Analysis (STA) flows, and methodologies.
  • Experience with physical design tools (e.g., Synopsys, Cadence) and timing signoff (Primetime).
  • Experience with Static Timing Analysis, sign-off corner definitions, process margining, SDC development, high frequency convergence, and setting up frequency goals with technology scaling.

Preferred qualifications:
  • Experience with Alternating Current (AC) timing from specs to implementation.
  • Experience with CppDefensiveCoding (CDC) design and CDC constraints.
  • Experience in Application-Specific Integrated Circuit (ASIC) physical design, physical design flows and methodologies, synthesis, place and route, and formal verification.
  • Knowledge of Design for testing (DFT) modes, noise and signal integrity effects.