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Google ATE Test Engineer Silicon United States, California, Mountain View 245473517
10.06.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience.
- 5 years of experience with Design For Test (DFT) methodologies, DFT verification, and industry-standard DFT tools.
- Experience scripting in Python or Perl or other related language.
- Experience with Automatic Test Equipment (ATE) test platforms such as Advantest 93K, Teradyne UltraFlex SOC test system.
- Experience with system level testing using Advantest SLT platform.
Preferred qualifications:
- 7 years of experience in the following areas: VLSI technologies, product and test engineering, semiconductor processing.
- Experience with SERDES, PCIe, DDR and Mixed-Signal circuits such as ADC, DAC, PLL, LDO and their performance measurements.
- Knowledge of Design for Test (DFT) techniques and structural tests such as Scan/ATPG, JTAG, and memory BIST.
- Familiarity with advanced packaging such as 2.5d, InFo.
- Familiarity with process technology and how it relates to design and testing Data analysis: wafer sort, final test.
- Familiarity with testing sensors such as PVT sensors, Temp sensors, etc.
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