Nvidia Silicon Validation Methodology Engineer 

United States, California 

242530593

Our ArchDev arm is a hub for all silicon and system level feature development, cost-benefit analysis, system integration solutions, and system POR alignment. As a member of this team, you will evaluate next gen silicon and define methodology, design, SW/FW, tool requirements needed for HW validation. The work you do will directly benefit the quality of NVIDIA products.

What you'll be doing:

• Evaluate new architecture, feature, and product use cases through a validation and debug lens.

• Develop and improve methodologies to incorporate new coverage and use case needs.

• Deliver requirements to SSG, Arch/HW, SW, FW, Application teams

• Lead debug efforts from HW side to root cause feature sequences bugs, silicon bugs and complex system level issues caused by interactions between multiple HW and SW features.

• Develop new methodologies, processes, and workflows for feature architecture and development.

• Apply insights from bring-up execution and post-action reviews to continually improve coverage.

What We Need to See:

• BS or MS degree in EE/CE or equivalent experience

• Effective in a collaborative environment.

• 10+ years of experience in some of the following areas:

• Defining HW validation and bringup methodologies for next generation silicon

• Deep understanding of GPU/SOC system level architecture

• Working experience with silicon active and low power features, boot, binning, PVT sensitivity, platform component losses

• Post silicon debug and evaluating fix options against product needs.

• Effective collaboration and communication across different functional teams.