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What You'll Be Doing:
Lead the planning andelectrical/functionalvalidation ofPCIe/Ethernet/USB3/UFSinterfaces for NVIDIA GPUs, CPUs, and SOCs.
Engage proactively with multi-functional engineering teams, including system architects, mixed-signal design, software/firmware, hardware/software quality assurance, operations, and application engineering to facilitate the design, development, debugging, and release of upcoming products.
Drive schedule, tuning guide, customer critical issues and design feedback.
Investigate technically complicated HSIO bugs and help drive debug efforts across various teams.
Coordinate with logic design, circuit design, board design, simulation, diagnostics, ATE, firmware, driver, and marketing teams to drive the chip into production.
Develop new methodologies to improve the HSIO validation process from both quality and effort-efficiency point of view.
What We Need to See:
BS or MS in Electronics Engineering (or equivalent experience) and a minimum of 3 years of proven experience.
In-depth understanding of PCIe (or similar) protocol
Excellent knowledge of signal integrity concepts, silicon characteristics, and high-speed/SERDES electrical validation and related tuning.
Hands-on on electrical validation with Good knowledge of lab equipment (DSOs, BERT, Protocol/Logic analyzers).
Understanding of firmware/driver structures and their interaction with Hardware.
Strong EE fundamentals, scripting languages (Perl, Python) to write direct test/debug programs for stress and failure analysis.
Strong project management, problem-solving, collaboration, and interpersonal skills.
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