As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip floorplan, area optimizations, block partitioning and pin placements• Own chip level place and route (PnR), final CPU layout database construction and verification (PDV)• Develop and validate Power Grid, including routability analysis• Drive custom layout integration, block and full-chip level EM/IR, electrical verification/analysis as well as formal verification• Work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout• Work with the SOC team to meet IP technical and delivery requirements• Participate in establishing CAD and physical design methodologies and flow development for chip integration and analysis• Scripting to automate tasks and improve debug efficiency