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Google Silicon Design Verification Engineer TPU Compute 
United States, California, Sunnyvale 
222087899

14.04.2025
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 7 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
  • Experience with SystemVerilog (i.e. SystemVerilog Assertions or functional coverage).

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • 10 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
  • Experience in verifying digital logic at RTL using SystemVerilog for ASICs.
  • Experience in memory subsystem design verification.
  • Experience in Power aware verification, Gate level simulations, and Post silicon bring-up.
  • Familiarity with ASIC standard interfaces and memory system architecture.