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Key responsibilities:
All aspects of physical design implementation and methodologies ranging from floorplaning, synthesis, automatic place and route, clock tree, multi-power and routing, leading to final GDS for graphics and computing blocks.
Verification and signoff implementation and methodologies ranging from static timing analysis, formal verification, reliability, power crossings and layout verification.
A bachelor's degree in Electrical, Electronics, Computer Engineering or a directly related discipline.
1+ year of experience in one, or more, of the following areas:
- CAD flow development and methodology definition for any of the aspects required on the Structural Design process including, but not limited to, construction flows (Synthesis, Automatic Place and Route, Clock Tree, etc.), signoff flows (Static Timing Analysis, Formal Verification, Reliability Verification, etc.) and Infrastructure (Engineering Computing, Design Data Management, etc.).
- ASIC physical design implementation and tape out.
- Power performance area (PPA) optimization through logic-design and EDA tool options.
- Demonstrated problem solving in ASIC implementation.
- Automation skills through Unix, Linux, Perl, Python and/or TCL programming.
- Proficiency with one or more of the following Industry standard EDA tools: Design Complier, Genus, ICC, Innovus, Primetime, Tempus, Spyglass, RedHawk, LEC Formality, etc.
Advanced English level.
Candidate must have unrestricted permanent right to work in Costa Rica
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