Intel Product Development Engineer 

Malaysia, Penang 

216515679

Job Description:

Job Description

• Responsible for Logic/Scan/Memory Diagnostics operations for Fault Isolation, Failure Analysis and Yield Improvement on Intel products in HVM.

• Support continuous yield improvement using volume diagnostics analysis and other diagnostics techniques for identification of systematic fails as well as for low yield debug.

• Work with FIFA and Foundry Engineering teams to plan and prepare for optimum failure analysis activities.

• Support and assist low yield debug and continuous yield improvement activities across all HVM products using bin and diagnostics analysis techniques.

• Work with the Diagnostics development team to create, enhance and verify cutting edge diagnostics capabilities for HVM.

• Perform circuit and layout tracing as necessary to enhance diagnostics-based failure analysis submissions.

• Track and report all diagnostics operations activities.

• Support and assist in organizing FA activities and related logistics for quick and cost-efficient failure analysis activities.

• Support the development and verification of cutting-edge diagnostics techniques as needed.

• Provide expertise in debugging reset flow or IO failures and narrow down to defect location for FA.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:

• 5+ years of experience in SemiconductorProduct/Test/DiagnosticsEngineering and Failure analysis.

• Experience with silicon foundry process and semiconductor yield and diagnostics analysis is a must. Experience in leading foundry technology is highly preferred.

• Sound problem-solving and taskforce management skills. Strong communication and presentation skills.

• Team player and self-motivated.

Preferred Qualifications:

• Familiarity with Scan and Memory diagnosis analysis and drill down systematic candidates for FA.

• Familiarity with Synopsys yield explorer tool is a plus.

• Experience in digital/mixed-signal circuit design or ESD/ LU design is a plus.

• Deep understanding of Intel reset flow and good knowledge on debugging IO failures.

• Familiarity with the aging model or experience in technology/ product quality and reliability area is a plus.

Experienced HireShift 1 (Malaysia)Malaysia, PenangTaiwan, Hsinchu