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What You'll Be Doing:
Develop and optimize standard cell templates in new process technologies.
Define and promote design for manufacturing (DFM) methodologies.
Improve library validation and release flow.
Write scripts using Perl, Python, tcl, Cadence SKILL, and C++.
Work with CAD tool vendors to evaluate new tools, resolve bugs and improve usability.
Partner with cross functional teams to continuously improve methodologies and efficiencies and drive efforts to resolution.
What We Need To See:
Hold a B.S or M.S. in Electrical Engineering (or equivalent experience) with 5 years industry experience.
Have an in-depth understanding of mosfet device behavior, CMOS layout, and VLSI design.
Experience working with standard cell design & layout.
Great interpersonal skills.
A passion for providing excellent support for end-users.
You will also be eligible for equity and .
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