Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
Experience in verifying digital reasoning at Register-Transfer Level (RTL) level using SystemVerilog or C/C++.
Experience with verification components and environments in standard verification methodology.
Experience in verifying digital systems using standard Internet Protocols (IP) components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience with coding languages and software development frameworks.
Preferred qualifications:
Master's degree in Electrical Engineering or Computer Science, or PhD in Electrical Engineering or Computer Science, or equivalent practical experience.
Experience in architectural background with Hierarchies, Coherency, Memory Consistency Models, Peripheral Component Interconnect Express (PCIe), Packet Processors, Security or Clock and Power Controllers.
Experience with building verification methodologies that span simulation, emulation and Field Programmable Gate Array (FPGA) prototypes.
Experience with performance verification of System on a Chip (SOCs), pre-Silicon analysis and post-Silicon correlation.