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Job Description:
here we create CMOS ASIC's for industry leading AI & Machine Learning, Wireless, Networking, Computing, and Storage products.
Job Responsibilities may include:
Floor planning chips and blocks
Timing, both mission mode and test modes
Integration of memories, SerDes, and I/O
Integration of test and clocking structures
Design of complex standard cell custom blocks.
Understanding of design tradeoffs for power, area, and speed.
Understanding of complex issues related to timing closure, power integrity and signal integrity.
Physical verification to ensure error free artwork/mask release.
Minimum Qualifications:
- Bachelor’s Degree in Electrical Engineering or Computer Engineering + 2 years related experience or Master's Degree in Electrical Engineering or Computer Engineering
Compensation and Benefits
The annual base salary range for this position is $81,000 - $130,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
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