Microsoft Senior Power & Performance Engineer 

United States, Oregon, Hillsboro 

204943368

Required/Minimum Qualifications

• 7+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 4+ years of experience in SOC power architectural trade-off analysis or design

Other Qualifications:

• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Additional or Preferred Qualifications

• Deep understanding of computer architecture, SOC and system-SW architectures, and their power/performance tradeoffs.
• Experience developing SOC power and performance modeling techniques and benchmarks from conception to microarchitecture specification to post-silicon validation.
• Understanding of memory and interconnect sub-systems.
• Experience in development of analysis tools written in C++ and Python.
• Knowledge of performance monitors and post-silicon SOC power and performance tuning.
• Familiarity with ASIC power analysis, low power design and power optimization.
• Communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

• Work with business, architecture, and design teams to understand power and performance requirements and collaborate across functional teams to meet these needs in technology development planning and path finding.
• Work with platform, firmware, and software teams across Microsoft to identify opportunities to improve system power and performance management with a goal of improved power efficiency across the stack.
• Develop power and performance modeling methodology by creating and owning System on Chip (SOC) architectural power models.
• Project and report power constrained SOC performance results to senior management.
• Maintain the power modeling infrastructure, used for power constrained performance projections.
• Work with IP Micro-architects and RTL team to incorporate low power design methodologies and power saving techniques. Identify IP/SOC power saving opportunities and drive definition of power saving uArch features.
• Understand product SOC power and performance interactions with power delivery and thermal solutions at the system level.
• Use case profiling, cloud computing workload analysis and PnP modeling, and correlation/validation to post-silicon.
• Apply your growth mindset to learn and adapt in a complex and dynamic environment.