IBM Physical Design Engineer 

India, Karnataka, Bengaluru 

20204501

• As a chip power lead, you will play a pivotal role determining the power budget, provide accurate power estimation, and drive power reduction efforts across the designs. You will be responsible for collaborating with the PGA (Power Grid Analysis) and system design teams (Power Constraints, Power Delivery, Packaging, Thermal, and Test) to build the system profiles dependent on accurate chip power projections.
• Your primary responsibilities include
• Define the power budget : Estimate the power for various design components based on chip architecture and come up with the power budget.
• Chip power estimation : Model chip power regularly based on the latest netlist using multiple modeling approaches
• Drive chip power reduction : Analyze the power data and drive the design teams to optimize power
• Collaborate with PGA and system design teams : Provide chip power data to PGA and system teams and collaborate with them to support the power demands and distribution, including Power Supply Constraints, Packaging, Thermal, and Test requirements.
• Post silicon validation : Once hardware is available perform correlation between actual hardware power vs. modeled power and address any gaps.
• Power flow development : Work with the EDA teams to optimize power analysis methodologies and tools.

How we’ll help you grow:
•You’ll have access to all the technical and management training courses you need to become the
expert you want to be
• You’ll learn directly from expert designers in the field; our team leads love to mentor
• You have the opportunity to work in many different areas to figure out what really excites you”