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Job Area:
Engineering Services Group, Engineering Services Group > Layout Engineer
Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.
Minimum Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 2+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
High School diploma or equivalent and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
• 2+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap).
Analog/RF Layout Engineer 5-8 Years
QCT RFFE design group is seeking an experienced Layout Engineer to fulfill both block and project lead level roles. Responsibilities will vary depending on experience and expertise. The layout designer will be responsible for physical design of RF and analog circuits in a fast-paced environment and short design cycle. Candidate should be able to do a Detail custom layout including floorplan, placement, routing, verification, and release of final database for high frequency RF circuits. Should be able to handle top level with excellent coordination between the block owners. Provide accurate schedule and plan to meet project milestone deadlines, debug complex verification errors and mentor junior layout designers. The layout designer should have strong analog and RF layout fundamentals and focused exposure in handling mature nodes.
MINIMUM QUALIFICATIONS:
At least 5-8 years of experience in the following: - RF high frequency circuit custom layout at chip, block, and device levels - LNA, mixer, and VCO
Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,
Must have good communication skills and should be team player.
Scripting and automation experience is a plus.
PREFERRED QUALIFICATIONS:
-Virtuoso XL - Caliber DRC/ERC/LVS verification and debugging tools
EDUCATION REQUIREMENTS:
Required: Bachelor's, Electrical/Electronic Engineering
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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