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Apple CPU Design Timing Engineer United States, Texas, Austin 196307317
13.06.2024
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Description
As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include but are not limited to: - Working extensively with CPU micro-architects and implementation engineers to drive timing closure for the CPU
Key Qualifications
- Minimum BS
- The ideal candidate will have an understanding of solid-state devices and circuit design
- Knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUs
- Basic experience with static timing tools and flows
- Physical design knowledge of device physics and in particular aspects which impact timing (cross talk, noise, OCV etc.)
- Good understanding of physical design tools and methodology including but not limited to physically aware synthesis and place & route tools and flows, extraction, STA, and other analysis flows, and physical design verification (LEC, DVS, etc.)
Education & Experience
Minimum BS
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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