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Google Custom Design Static Timing Analysis Engineer Silicon India, Karnataka, Bengaluru 192625059
10.04.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, a relevant technical field, or equivalent practical experience.
- 5 years of experience in static timing analysis with mixed- signal designs.
- Experience in timing flow methodology and development.
- Experience in HSPICE, Nanotime, Liberate, Silicon Smart, or Virtuoso.
- Experience in coding using Perl, Python, TCL scripting languages.
Preferred qualifications:
- Master's degree or PhD in Computer Science, Electrical Engineering, or a related field.
- 10 years of experience in STA with experience on Analog/mixed signal designs.
- Experience with IP collateral generation/QA.
- Experience in Cadence/Synopsys tools.
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