Microsoft Research Intern - Data Center AI Networking Transport Telemetry 

United States, California, Mountain View 

189909780

As a Research Intern in the Strategic Planning and Architecture (SPARC) group, you will contribute to the design and development of transport features and telemetry systems for data center and AI networking environments. This role encompasses topics such as congestion control, load balancing, network reliability, and telemetry, with a focus on a specific subset of these areas relevant to the internship. You will have the opportunity to validate these solutions within a testbed environment and may utilize simulation tools to guide solution design.

Applicants should demonstrate depth of knowledge in networking and demonstrate experience in low-level programming, experimentation, and modeling. Experience in software and hardware network programming is a plus, as it will aid in developing and prototyping networking solutions.

• Currently enrolled in a PhD program in Computer Science or a related STEM field.

Other Requirements

• Research Interns are expected to be physically located in their manager’s Microsoft worksite location for the duration of their internship.
• In addition to the qualifications below, you’ll need to submit a minimum of two reference letters for this position as well as a cover letter and any relevant work or research samples. After you submit your application, a request for letters may be sent to your list of references on your behalf. Note that reference letters cannot be requested until after you have submitted your application, and furthermore, that they might not be automatically requested for all candidates. You may wish to alert your letter writers in advance, so they will be ready to submit your letter.

• Background in computer networking with a thorough understanding of transport protocols, congestion control.
• Familiarity with network simulation environments (e.g., NS3, OMNET++) or experience with hardware RTL development (Verilog/VHDL) and prototyping (FPGA / ASIC).
• Experience building networked systems and programming networking hardware, e.g. NICs and/or switches in datacenters.
• Familiarity with large language models, and experience training them at scale, or running inference.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

• Engage early with their mentors to clearly formulate a plan of work for the 12 weeks of the Research Internship.
• Clearly and frequently document and communicate their progress, adjusting the plan as the project evolves.
• Show initiative and think unconventionally to derive creative and innovative solutions.