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Apple CAD Engineer Logic Equivalence & ECO 
United States, Texas, Austin 
183999216

18.11.2024
Description
In this highly visible role, your primary responsibilities will include: - Developing, maintaining, and enhancing CAD applications for logical equivalence.- Supporting frontend design closure , ECO verification, and flow signoff.- Triaging and solving CAD flow problems, and working around EDA tool problems. - Working directly with EDA vendors to resolve tool issues, and identifying enhancements.- Using ML and GenAI based solutions to improve CAD applications
Minimum Qualifications
  • Knowledge of Tcl, Python or Perl scripting languages.
  • Knowledge of Verilog or SystemVerilog coding for hardware design or verification.
  • Minimum requirement of BS and 0+ years of relevant industry experience
Preferred Qualifications
  • Proficiency in scripting languages, such as Python, Perl, and TCL
  • Excellent communication skills, including previous customer support experience
  • Excellent interpersonal skills, including collaboration, inclusivity, active listening, and a growth mindset.
  • Comfort within Linux/Unix environments.
  • Familiarity with current Gen AI research in one of the following areas: RAG, Semantic Search, or Prompt Engineering is a plus
Additional Requirements
  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.