Marvell Staff Analog Mixed Signal IC Design Engineer 

United States, California 

178184481

What You Can Expect

• Drive functional verification of complex networking blocks using UVM/SystemVerilog.
• Develop and maintain advanced verification components and testbenches.
• Collaborate with cross-functional teams including architecture, design, firmware, and post-silicon.
• Contribute to methodology and infrastructure improvements in a dynamic and innovative environment.

What We're Looking For

• B.Sc. or M.Sc. in Electrical/Computer Engineering
• 7+ years of hands-on experience in ASIC/RTL verification
• Strong background in SystemVerilog and UVM methodology
• Deep understanding of coverage-driven verification, object-oriented programming, and constrained random testing
• Excellent problem-solving skills and self-learning ability