Qualification : Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 14 years of relevant industry experience. Experience : Relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verificationExpertise in design, development and integration of design blocks (IP) for system-on-chip (SoC) componentsExpertise in verilog and system verilog based logic designExperience in all design tools like linting, DC, CDC, LECExperience in one/more of the following areas PCI_Express, USB, SATA, SDIO,MIPI and /or AMBA standards (OCP, AXI, AHB etc..)Knowledge of SVAKnowledge of RAS domain is a bonusKnowledge of considerations for performance, power and cost optimization is desirable