Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
3 years of experience with multiple SoCs with Silicon success.
Experience with chip design flow.
Preferred qualifications:
Experience in micro-architecture and coding in one or more of the following areas: memory compression, interconnects, coherence, cache.
Knowledge of ARM based SoC, Debug (coresight).
Understanding of cross-domain involving domain validation, design for testing, physical design, and software.
Understanding of Verilog or System Verilog language.
Proficiency with ASIC design methodologies for front quality checks like; Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation.