Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with silicon development (e.g., research, algorithm development, digital and physical design, implementation, verification, bring-up and post-silicon maintenance).
Experience in ASIC hardware architecture and silicon design.
Experience in coding with C or C++, and scripting languages, such as Perl or Python.
Experience in RTL coding using Verilog or SystemVerilog.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
10 years of experience in the field of ASIC/SoC development.
Experience across the full Application-Specific Integrated Circuit (ASIC) design flow, including UVM/OVM verification, synthesis, and timing closure.
Experience leading projects with HLS tools like Vivado HLS and Catapult.
Experience with ML acceleration hardware or applying ML to video processing/compression, demonstrating system-level problem-solving across hardware and software.
Ability to lead RandD of silicon algorithms and program execution.