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Apple Digital Layout Design Engineer United States, California, San Diego 159671737
07.04.2025
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- • We are looking for applicants experience in custom layout design of deep SubMicron CMOS circuits used in high performance microprocessors.
- • Experience designing low noise, low power datapaths, SRAM, Register files layout structures, etc.
- • High level proficiency in layout floorplanning, standard cell planning and hierarchical layout assembly.
- • Good understanding of issues with RC delay, electromigration, self heating and cross capacitance.
- • Recognize failure prone circuit and layout structures, dedicatedly work with designers for the best approach to problems.
- • Excellent communication skills and able to work with multi-functional teams.
- • Great skills on interpretation of CALIBRE DRC, ERC, LVS, etc. reports.
- • Knowledge of MENTOR GRAPHICS or CADENCE layout tools.
- • Scripting skills in CSH, PERL or SKILL are considered a plus, but not required.
- • Experience in layout automation is considered a plus, but not required.
- • Experience in memory compiler development is considered a plus, but not required.
BS degree and a minimum of 10 years relevant industry experience
- Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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