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What you’ll be doing:
You will be responsible for all aspects of front-end design implementation methodologies (synthesis,formal-equivalence-checking),flow automation and application support of industry-leading CPU designs.
Focus on generating new ideas, proving those, putting together flows/methodologies around those, and incorporating those in NVIDIA’s implementation flow for CPU designs.
Use NVIDIA implementation flows and EDA tool expertise to improve PPA (power, performance and area) on CPU designs by collaborating with logic designers, physical designers and EDA vendors
Provide support for EDA tools and flows
What we need to see:
BS or MS (or equivalent experience)
6+ years of CPU design implementation experience
Deep understanding of logic optimization techniques and relative area, timing, and power trade-offs
Should be a power user of synthesis and/or place and route EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus)
Strong understanding of physical design implementation eg: physical synthesis, placement, routing, logic restructuring, etc.
Good debugging and problem-solving skills
Strong interpersonal skills along with the ability to work in a dynamic team
Ways to stand out from the crowd:
Prior CPU experience in physical implementation methodology
Proficiency in Perl, Python, Tcl, Make scripting
You will also be eligible for equity and .
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