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Google ASIC SoC Design Engineer India, Karnataka, Bengaluru 140905807
21.04.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 3 years of experience in RTL coding using Verilog or Systemverilog language.
- Experience in high-performance design, multi-power domains with clocking.
Preferred qualifications:
- Experience with multiple SoCs with silicon success.
- Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation).
- Domain knowledge of one or more of the following: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, PinMux.
- Understanding of cross-domain involving domain validation, design for testing, physical design, and software.
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