We are looking for applicants with work experience within a SoC design cycle, developing circuits and SRAM/Register File for low power, low voltage and high performance.
Knowledge of Cache design/architecture, memory hierarchy is a huge plus.
Working knowledge of RTL modeling
Solid understanding of industry-standard design tools.
Deep understanding of nanometer device physics, leakage mechanisms, technology interactions with device behavior.
Ability to devise experiments and analyze data for silicon debug.
Machine Learning algorithms (ML) and scripting is a big plus.
Description
As an SRAM Circuit Designer for the Digital Custom Group, you will perform the following:
Education & Experience
BS and a minimum of 3 years of relevant industry experience.