Share
What you'll be doing:
Work on crafting creative Signal Integrity solutions to complex system design problems.
Modeling and Optimization of vias, connectors, sockets, breakouts and various system components in 3D EM tools.
System-level signal integrity simulations in any one of the high-speed GDDR7/6X, LP5X, DDR4/5, HBM3/4, DRAM interface
SI model correlations using lab measurements to improve modellingtool/methodology.
Package substrate and board layout SI design constraint creation, review with pre/post layout SI
Opportunity to work in a dynamic cross-functional role to optimize package, PCB, ASIC, SerDes designs.
What we need to see:
BS/MS-Electrical Engineering or equivalent experience
3+ years of industry experience.
SI work on one or more signaling standards like PCI express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X, etc.
Hands on use of 3-D modeling tools like ANSYS HFSS/Q3D, 2.5-D with ANSYS SIWAVE or similar and 2D such as Ansys2D.
Familiarity with a system level timing or loss budget including silicon, package and board impairments.
Background with use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro will be a plus.
Ways to stand out from the crowd:
Expertise in one or more of the high speed interface SI/PI design on any industry standard system platforms.
Experience with lab measurements, debugging, SI lab correlation using oscilloscope/ spectrum analyzer/ VNA.
Knowledge of circuit design, board/pkg technology & design flow, link architecture, timing budget methodologies.
Familiarity with PDN evaluation using layout extraction tools for packages and PCBs.
You will also be eligible for equity and .
These jobs might be a good fit