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Apple SoC Design/Integration & Synthesis Engineer United States, California, Cupertino 124657939
07.04.2025
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As an SOC/ASIC Integration & Synthesis Engineer, you will have responsibilities spanning various aspects of SOC design: - Drive all front-end integration activities like Integration, Synthesis, UPF, Logical Equivalence, ECO, etc. - Work closely on methodology improvements for improving synthesis QOR.- Work on Low power design, writing UPFs, close on power intent verification at the chip level.- Work on RTL integration, timing constraints, and synthesis of designs.- Knowledge of FE flows like Lint & LEQ and scripting is a plusWork closely with other engineers that are members of the SOC Design, SOC Design Verification, Emulation, STA, Power, and Physical Design teams.
- BS with 0 years relevant industry experience.
- Expertise in digital design integration, synthesis, UPF, timing analysis, and closure.
- Synthesis/Integration of RTL background and basic understanding of UPF. PNR is plus.
- Worked closely on improving low-power synthesis methodologies.
- Hands-on experience in all aspects of the chip development process with proficiency in front-end tools and methodologies
- Experience with scripting languages like Perl or Tcl or Python
- RTL logic design or implementation experience on multi-million gate ASICs will be a plus
- Ability to communicate effectively across all internal groups
- Attention to detail and desire to learn.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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