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Google Silicon IP RTL Design Engineer Google Cloud India, Karnataka, Bengaluru 122162371
28.04.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 5 years of experience in ASIC development with Verilog/SystemVerilog, Vhsic Hardware Description Language (VHDL), or Chisel.
- Experience with ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).
- Experience in micro-architecture and design of IPs and subsystems.
Preferred qualifications:
- Experience with coding languages (e.g., Python or Perl).
- Experience in System on a Chip (SoC) designs and integration flows.
- Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
- Knowledge of high performance and low power design techniques.
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