Microsoft Principal Validation Engineer 

United States, California, Mountain View 

113264463

Principal Validation Engineerto work in the dynamic Microsoft Artificial Intelligence System on Chip (AISOC) Silicon team. You will be part of the Post-Silicon Validation team, driving many facets of high performance, high bandwidth designs.

Required Qualifications:

• 9+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
• 7+ years of experience in pre-silicon and post-silicon validation with a proven track record of delivering high performance Central Processing Unit (CPU), Vector processors and Graphics Processing Unit (GPU’s) or relevant experience.

Other requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.

Preferred Qualifications:

• Experience driving and developing tools for pre and post-silicon validation. Developed automation flows.
• Experience with Scan /Joint Test Action Group(JTAG) based debugging methodologies, tools for board management, exposure and knowledge of embedded processor debuggers.
• Good software skills. Programming skills in C/C++, System Verilog, Assembly, Python and knowledge of advanced computer architecture and boot flow. Knowledge of Future Technology Devices International(FTDI) / Open On-Chip Debugger(openOCD).
• Hands on experience with validation for multiple product cycles from definition to Silicon, including writing test plans, developing tests and debugging failures.
• Experience with high speed IOs and industry standard bus/parallel/serial protocols like Ethernet, Peripheral Componenet Interconnect Express(PCIE), JTAG, Advanced eXtensible Interface(AXI). Advanced High-performance Bus(AHB) and I2.
• Good communication skills, team player, self-driven and problem solving ability.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Microsoft will accept applications for the role until August 14, 2024.

• Lead key components of tooling and infrastructure for validation of complex System on Chip(SOCs).
• Define, develop and deploy tools and methodologies for volume test execution and efficient silicon debug.
• Ensure robust infrastructure in place for Pre-Silicon SoC verification, Post-Silicon/Field-Programmable Gate Array(FPGA) validation.
• Work with Cross functional teams, Architecture, Design, Verification, Partner teams for project execution and also define validation tools/methodologies for next generation designs.
• Running tests, debugging failures, creating stress and performance scenarios to meet test plan goals.
• Actively participate in chip bring up and write test firmware to support various teams.
• Coach and mentor others in your areas of expertise.
• Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion.
• Other
  • Embody our and