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Google ASIC Design Manager TPU Compute United States, California, Sunnyvale 101037806
11.08.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with IP Development or SoC Integration, from early architecture phase through tapeout.
- 3 years of experience in people management, developing employees.
- Experience in ASIC development with System Verilog.
- Experience in Computer Architecture, including working with CPU cores, GPU Streaming Multiprocessors, or ML accelerator cores.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- 12 years of experience with IP Development or SoC Integration, from early architecture phase through tapeout.
- Knowledge of high performance and low-power design techniques.
- Knowledge of ASIC Verification, Design For Testing (DFT), Synthesis, Static Timing Analysis (STA), or Physical Design.
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