Jobs in Argentina, Córdoba, Cordoba

What You Can Expect

• Perform full-chip and block-level static timing analysis for advanced ASIC designs
• Develop, maintain, and optimize timing constraints, methodologies, and automation scripts
• Own timing closure across all stages of the design flow: RTL, synthesis, physical implementation, and signoff
• Debug and resolve complex timing violations and drive design fixes
• Collaborate closely with design, synthesis, and physical design teams to meet performance, power, and area (PPA) goals
• Provide guidance on design partitioning, floorplanning, and timing budgeting strategies
• Contribute to design reviews and provide expert insights for design improvements

What We're Looking For

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline
• 8+ years of hands-on experience in STA and timing closure for large-scale ASIC designs
• Strong proficiency with EDA tools such as Synopsys PrimeTime, PrimeTime SI, and/or Cadence Tempus
• Deep understanding of timing concepts, constraints development, and signoff methodologies
• Demonstrated success in driving complex designs to timing closure
• Excellent problem-solving skills and strong attention to detail
• Strong communication skills and proven ability to work effectively in a collaborative team environment

• Preferred Experience:

• Familiarity with scripting languages such as Tcl, Perl, or Python
• Experience with hierarchical timing andmulti-mode/multi-corner(MMMC) analysis
• Knowledge of data center ASIC architecture or high-performance computing systems

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• Collaborating with cross-functional teams: Work closely with circuit design, applications engineering, packaging technology, and board design teams to define and implement system interconnects that meet both internal specifications and customer requirements.
• Conducting simulations and analysis: Perform SI/PI simulations and analysis to predict and mitigate potential issues in the design phase.
• Developing SI/PI design rules: Create and maintain design rules for floorplan, RDL, bump patterns, 2.5D/2D package, and PCB layouts to ensure signal and power integrity across the system.
• SI/PI modelrelease: Release
• Providing technical support: Offer technical support and guidance to other teams and customers regarding SI/PI issues and best practices.

What We're Looking For

• Bachelor’s degree in electrical engineering and 8+ years of related professional experience or Master’s degree/PhD in electrical engineering with 5+ years of experience.
• Solid transmission line and EM background is a must.
• Must have good knowledge aboutinterposer/package/PCBdesign rules, routing feasibility and SI/PI design consideration.
• Experiences in die-to-die interposer, package and PCB high density trial routing study by using Cadence tool such as APD or PCB editor is good plus.
• System-level SI/PI simulation experience such as DDR/NAND and PCIe/Ethernet is preferred.
• Always do the right thing and represent Marvell with ethics and integrity.

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• Own a chip/macro layout
• Own the overall project schedule, leveraging the design lead and layout manager as needed.
• Work effectively with various groups including layout, design, backend, frontend, ESD, packaging, CAD, etc. Represent layout within the project cross-function team with leading a team, including remote design teams
• Help implement project specific guidelines and ensure team-members follow them
• Contribute to overall team through tool testing, script development, flow documentation, training, etc.
• Keep abreast of technology and tool developments and bring new ideas to the team.

What We're Looking For

• Bachelor’s or Master's degree in Computer Science, Electrical Engineering or related fields and at least 5+ years of related professional experience.
• Deep understanding of layout methodology from initial chip planning to tape-out.
• Deep understanding parasitic optimizing in layout
• Experiences in advanced process technology and Fin-FET is preferable.
• Have a high level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. reports.
• Have a high-levelproficiency/knowledgeof Synopsys or CADENCE layout entry tools.
• Programming skills in any of the following are a plus: Skill or Ample or Perl, etc.
• Strong technical and analytical background, problem solving skills, etc.
• Fluent in English
• Team player

What You Can Expect

• Proactively & efficiently support Marvell's PCIe interconnect products.
• Own and drive customer issues to resolution.
• Act as the interface between the customer and Marvell engineering teams to resolve technical issues.
• Requires collaboration with FAE's and PLM's to gather and communicate customer needs to marketing and engineering.
• Occasional travel to industry events/customer sites is required.

What We're Looking For

Bachelor’s degree in Electrical Engineering or related fields and 5-10+ years ofrelated professionalexperience. OR Master’s degree and/or PhD inElectrical Engineeringor related fields with 5+ years of experience.

• Good understanding of digital signal processing (DSP), analog circuits and system hardware.
• Lab experiences with PAM4 SerDes TX and RX validation is preferred / Good problem-solving skills & Hands-on lab experiences.
• Experiences in PCIe interconnect devices are required including but not limited to PCIe Switch, Bridge, Retimer, Redriver..etc.
• Prior experience as an Application Engineer working with customers to resolve customer issues is a plus.
• Good verbal and written communication skills.
• Knowledge in C and/or Python is a plus.

What You Can Expect

• Proactively & efficiently support Marvell's PCIe interconnect products.
• Own and drive customer issues to resolution.
• Act as the interface between the customer and Marvell engineering teams to resolve technical issues.
• Requires collaboration with FAE's and PLM's to gather and communicate customer needs to marketing and engineering.
• Occasional travel to industry events/customer sites is required.

What We're Looking For

Bachelor’s degree in Electrical Engineering or related fields and 5-10+ years ofrelated professionalexperience. OR Master’s degree and/or PhD inElectrical Engineeringor related fields with 5+ years of experience.

• Good understanding of digital signal processing (DSP), analog circuits and system hardware.
• Lab experiences with PAM4 SerDes TX and RX validation is preferred / Good problem-solving skills & Hands-on lab experiences.
• Experiences in PCIe interconnect devices are required including but not limited to PCIe Switch, Bridge, Retimer, Redriver..etc.
• Prior experience as an Application Engineer working with customers to resolve customer issues is a plus.
• Good verbal and written communication skills.
• Knowledge in C and/or Python is a plus.

What You Can Expect

• Lead in developing, implementing, and executing on strategic benefit programs and policies for North America
• Prepare reporting on benchmarking and analytics, monitor trends, and propose enhancements to ensure benefit program competitiveness
• Lead the annual plan renewals, including partnering with the external benefits consultants to evaluate and prepare recommendations for senior leadership’s review
• Project manage all aspects of the Open Enrollment period, overseeing internal and external teams to ensure all communications, implementations, file integrations, and payroll setup is successful for 1/1 and beyond
• You will collaborate with and manage the relationships with benefit carriers, vendors, brokers and advisors, including ongoing vendor partner meetings, assessing performance, measuring program effectiveness, and issue resolution
• Ensure all compliance, filings, disclosures, and audits are conducted timely, staying on top of regulatory changes and partnering with internal teams to ensure compliance with all federal and state regulations, ensuring appropriate controls, documentation, and recordkeeping
• You will manage the retirement plan Canada and may support projects relating to the U.S. 401(k) and NQDC plans
• Establish strong partnerships with HR Ops, Payroll, Finance, and other internal stakeholders; lead cross-functional projects to implement changes or new offerings and streamlines operations
• As needed, you will lead M&A efforts for North America, including plan analysis, preparing recommendations for senior leadership, and ensuring successful execution of decisions for seamless employee benefit experience
• Resolve complex issues, including escalations, and propose resolution recommendations for senior leadership review
• Develop and execute on communication strategies to educate employees on benefit programs and the value of Marvell’s offerings, including leading employee presentations during Open Enrollment and other education initiatives
• You will lead or be a core team member in special projects as needed, including cross functional projects

What We're Looking For

• 7 – 10 years of benefits experience, preferably at a high-tech company, with at least 3 years of experience leading healthcare strategies
• Excellent collaborator, partnering with and leading internal and external teams to resolve issues and complete complex projects
• Exceptional communicator, both written and oral, including skills for developing and delivering high-quality presentations
• Strong project and program management skills, including the ability to effectively juggle many competing priorities in a fast-paced environment
• Experience with benefit vendor management, including implementations, holding vendors to SLAs, issue resolution
• Knowledge of regulatory and compliance requirements related to benefits, including ERISA, COBRA, HIPAA, ACA, etc.
• Experience leveraging AI technologies to enhance strategy and program results
• Advanced Microsoft Excel and PowerPoint skills.
• Experience with common HR and Benefits systems such as Workday, benefit enrollment systems, etc.
• Has an employee-first mindset, driven to provide employees with excellent service and programs

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• Analyze the and extract Spec, createcomprehensivetest plan and coverage plan.
• Contribute to the development of UVM components, ENV, Coverage model, and Assertion protocol checkers.
• Write testcases, run simulation, regression.
• Debug and propose bug fixings.
• Merge, analyze and improve the coverage results.
• Run GLN/SDF simulation and propose ECO fixings.

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 2-3 years of related professional experience, or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 1-2 years of experience.
• Experience with Verilog and SystemVerilog, preferably with UVM.
• Basic proficiency with C/C++.
• Experience with scripting languages, e.g., Python or Perl.
• Working knowledge of the Linux operating system.
• English Proficiency is a plus.